Graph neural networks (GNNs) and reinforcement learning (RL) have been a great success in solving many complicated real-world problems. In this talk, we will demonstrate their applications in a long-standing and essential area, electronic design automation (EDA). In EDA, many problems can be formulated as graphs, such as data flow graphs, netlists, and transistor-level circuits. As a case study, we will address a key challenge in High-Level Synthesis using GNN and RL, formulating it as a Program-to-Circuit problem. We propose an end-to-end generalizable framework named IronMan, composing of an accurate circuit quality predictor and a flexible design space exploration (DSE). Outperforming the traditional HLS tools, this work demonstrates the potential success in applying machine learning algorithms in the EDA, especially the hard-to-solve problems such as timing estimation and optimization. To further discuss the capability of GNNs in a broader area, we extend Program-to-Circuit to Program-to-X, based on the observation that many program-related problems can be formulated as a graph. We hope that by studying the strength and weaknesses in applying GNNs on Program-to-X, we could contribute to a large variety of program-related problems.
Cong (Callie) Hao is an Assistant Professor at the Department of Electrical and Computer Engineering (ECE) at the Georgia Institute of Technology (GaTech) since 2021. She was a postdoctoral fellow in ECE at the University of Illinois at Urbana-Champaign from 2018-2020. She received the Ph.D. degree in Electrical Engineering from Waseda University, Japan, in 2017, and the M.S. and B.S. degrees in Computer Science and Engineering from Shanghai Jiao Tong University. Her primary research interests lie in the joint area of efficient hardware design and machine learning algorithms, and she is passionate about reconfigurable and high-efficiency computing and building useful electronic design automation tools.
Join via Zoom: https://stevens.zoom.us/j/2193430751